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RISCBoy: open-source Game Boy built on RISC-V and FPGAs

Huma ShaziaJuly 12, 2026 at 10:02 PM5 min read
RISCBoy: open-source Game Boy built on RISC-V and FPGAs

Key Takeaways

A Promising New Open-Source FPGA Handheld

RISCBoy: open-source Game Boy built on RISC-V and FPGAs
Source: Hacker News: Best
  • RISCBoy implements a complete 32-bit RISC-V console from scratch, including CPU, graphics, and PCB, on a $15-25 FPGA
  • The entire toolchain is open-source, from Verilog synthesis to place-and-route, eliminating proprietary vendor lock-in
  • The project demonstrates extreme hardware optimization: fitting a 32-bit games console into just 7,680 logic elements

Luke Wren built an entire portable games console from scratch. Not just the software. The CPU. The graphics pipeline. The memory controllers. The PCB. All of it open-source, all of it targeting a $25 FPGA you can order today. He calls it RISCBoy, and it's what a Game Boy Advance might have looked like if RISC-V had existed in 2001.

The project, which surfaced on Hacker News this week, represents something rare: a complete, documented, reproducible hardware design that anyone can build, modify, and learn from. For founders building hardware startups or engineers curious about chip design without million-dollar toolchains, RISCBoy offers a roadmap.

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What exactly does RISCBoy include?

The scope is ambitious. RISCBoy ships with a custom RISC-V processor supporting the RV32IMC instruction set, meaning it handles 32-bit operations with hardware multiply/divide and compressed instructions. The CPU passes the official RISC-V compliance suite and the riscv-formal verification suite. It's not a toy implementation.

Beyond the processor, the project includes a raster graphics pipeline with display controller, bus fabric for connecting components, memory controllers, UART and GPIO peripherals, and a complete PCB layout in KiCad. The schematic is public. The board fits iTead's 4-layer 5x5 cm prototyping service at $65 for ten units.

A Gameboy Advance from a parallel universe where RISC-V existed in 2001. A love letter to the handheld consoles from my childhood, and a 3AM drunk text to the technology that powered them.

— Luke Wren, creator of RISCBoy

Why target the iCE40-HX8k FPGA?

The iCE40-HX8k is a peculiar choice. It's small. Just 7,680 logic elements, LUT4-based. Fitting a 32-bit games console into that space requires, as Wren puts it, "a crowbar and some vaseline, or perhaps just careful design."

But the HX8k has a killer feature: full support from the open-source Icestorm FPGA toolchain. That means Yosys for synthesis, nextpnr for place-and-route, and Project Icestorm for bitstream generation. No Xilinx Vivado license. No Intel Quartus installation. The entire flow runs on Linux, and reportedly even on a Raspberry Pi.

For hardware startups, this matters. Proprietary FPGA tools are expensive, brittle, and create vendor lock-in. An open toolchain means reproducible builds, easier CI/CD integration, and no licensing headaches as you scale a team.

The optimization challenge

7,680
Total logic elements available on the iCE40-HX8k FPGA for the entire console design

Modern FPGAs like Xilinx's Artix-7 offer hundreds of thousands of logic cells. The HX8k forces ruthless prioritization. Every register, every multiplexer, every state machine competes for space. Wren's design decisions, visible in the synthesizable Verilog 2005 source, offer a masterclass in embedded constraint engineering.

The project also supports an even smaller variant: the iCE40 UP5k. On that chip, RISCBoy can be configured to use an RV32I-only processor, dropping the hardware multiplier and compressed instructions to save gates. This flexibility shows up in the build system's multilib configuration, which generates standard libraries for each ISA variant.

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What does the toolchain look like?

Building RISCBoy requires the RISC-V GNU toolchain configured for RV32IMC. The repository includes detailed instructions for Ubuntu, covering prerequisites like autoconf, bison, and flex. The configure step specifies the architecture and ABI, and critically, the multilib generator flags ensure the toolchain produces libraries for all ISA variants the project might use.

Simulation uses Xilinx ISIM 14.x, though only for verification. The actual FPGA build is entirely open-source. The project's README walks through cloning with recursive submodules, sourcing environment variables, and running the test suite. It's not a plug-and-play weekend project, but it's documented well enough that a motivated engineer can follow along.

Hardware costs and accessibility

Development boards for the iCE40-HX8k cost $15-25. The PCB prototype run costs $65 for ten boards. Components are standard. There's no exotic silicon, no NDA-protected IP blocks, no minimum order quantities in the thousands. A solo developer with a few hundred dollars can build real hardware.

The project also has experimental ECP5 support for Lattice's larger FPGAs, with board files for the LEF5UM5G-85F-EVN evaluation board. That build replaces external memory with on-chip resources, trading cost for complexity.

What can founders learn from RISCBoy?

Hardware startups often face a chicken-and-egg problem: you need expertise to build expertise. Custom silicon is prohibitively expensive. Off-the-shelf modules limit differentiation. RISCBoy demonstrates a middle path: FPGA-based prototyping with open tools, enabling rapid iteration before committing to an ASIC.

The project also shows what documentation should look like. Schematics are public PDFs. Build steps are scripted. Test suites are included. This isn't just a code dump; it's a teaching resource. For teams evaluating whether to open-source their hardware IP, RISCBoy offers a template.

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Logicity's Take

RISCBoy matters beyond nostalgia because it proves a solo developer can ship a complete, verified, manufacturable hardware design using only open-source tools. For hardware startups, the takeaway is strategic: FPGA prototyping on open toolchains like Icestorm (now part of the broader YosysHQ ecosystem) eliminates vendor lock-in and reduces early-stage costs dramatically. Competitors in the open-hardware FPGA space include Radiona's ULX3S (ECP5-based, ~$100) and the TinyFPGA series. If you're exploring RISC-V for embedded products, SiFive's HiFive boards offer commercial support, while open projects like RISCBoy provide hands-on learning without licensing fees.

Frequently Asked Questions

Can I actually build RISCBoy myself?

Yes. The repository includes all source files, build scripts, and PCB designs. You'll need to order an iCE40-HX8k development board ($15-25) and optionally fabricate the custom PCB. The toolchain is open-source and runs on Linux.

What games can RISCBoy run?

RISCBoy isn't Game Boy compatible. It's a custom console that requires software written specifically for its hardware. The repository includes test programs and a bootloader, but a game library would need to be developed by the community.

How does RISCBoy compare to a Raspberry Pi for retro gaming?

Completely different use cases. A Pi runs emulators on a Linux OS. RISCBoy is the actual hardware implementation: custom CPU, custom graphics, no operating system layer. It's for learning chip design, not for playing ROMs.

Why use RISC-V instead of ARM or x86?

RISC-V is an open instruction set architecture with no licensing fees. ARM requires royalties. x86 is proprietary. For an open-source hardware project, RISC-V is the only viable choice that allows full transparency.

Is RISCBoy suitable for commercial products?

As a learning platform and prototype, yes. For production, you'd likely move from FPGA to ASIC for cost and power efficiency. But the verified RISC-V core and peripheral IP could inform that transition.

Also Read
Sony kills PlayStation discs in 2028 as 80% go digital

Contrast RISCBoy's open-hardware philosophy with how major console manufacturers are moving to closed digital ecosystems

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Source: Hacker News: Best

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Huma Shazia

Senior AI & Tech Writer

Produced with AI assistance and reviewed by the Logicity editorial team. Learn more in our Editorial Policy.