All posts

AMD unveils Helios rack, MI455X GPU to challenge Nvidia

Huma ShaziaJuly 24, 2026 at 9:47 AM6 min read
AMD unveils Helios rack, MI455X GPU to challenge Nvidia

Key Takeaways

Unveiling AMD \"Helios\" Optimized AI Rack Solution

AMD unveils Helios rack, MI455X GPU to challenge Nvidia
Source: Computerworld
  • AMD's Helios rack ships in H2 2026 with 72 MI455X GPUs, 18 Venice CPUs, and 2.9 exaflops of AI compute
  • MI455X delivers 432GB HBM4 memory per GPU, addressing the memory wall in large reasoning models
  • AMD uses open-standard UALink over Ethernet for scale-up fabric, giving cloud providers more supplier flexibility

AMD announced its Helios rack-scale AI platform at its Advancing AI 2026 event in San Francisco on July 23, pairing 72 of its new MI455X GPUs with 18 Venice CPUs in a direct challenge to Nvidia's Vera Rubin architecture. Shipments begin in the second half of 2026. The announcement marks AMD's most aggressive move yet into integrated AI infrastructure, where Nvidia has dominated enterprise and hyperscaler deployments.

Advertisements

What does MI455X bring to the table?

The Instinct MI455X is AMD's first GPU built on its CDNA 5 architecture. It uses a mix of 2nm and 3nm chiplets and packs 432GB of HBM4 memory with 23.3TB/s of peak memory bandwidth. Those figures represent 1.5x the memory capacity and up to 2.9x the bandwidth of AMD's current MI355X.

AMD Instinct chart showing generational leap in performance
AMD Instinct chart showing generational leap in performance

AMD claims the MI455X delivers up to 4x the peak matrix performance using MXFP4 and MXFP8 data types, the lower-precision formats increasingly common in AI inference. Internal benchmarks using production silicon showed 3.8x higher FP8 decode performance and 3.5x more measured FP4 compute versus the MI355X. These remain AMD-provided figures awaiting independent validation.

The memory focus matters. Large reasoning models and long context windows require substantial KV caches to maintain attention states. Mixture-of-experts models shuffle data constantly between accelerators. MI455X lets more of that data stay local, reducing the latency penalty of remote fetches. New hardware IP handles data transfers while the GPU continues processing.

How does Helios compare to Nvidia's Vera Rubin?

Helios is AMD's answer to Nvidia's Vera Rubin rack-scale platform. A fully configured, liquid-cooled Helios rack contains 72 MI455X GPUs, 18 single-socket Venice CPUs, and Pensando networking. AMD rates it for 2.9 exaflops of low-precision AI compute, with 31TB of HBM4 capacity, 1.7PB/s of memory bandwidth, and 260TB/s of bidirectional scale-up bandwidth.

AMD Helios rack
AMD Helios rack
SpecificationAMD Helios (MI455X)AMD MI355X (prior gen)
GPUs per rack72N/A (server-scale)
HBM capacity per GPU432GB HBM4288GB HBM3e
Memory bandwidth per GPU23.3TB/s~8TB/s
Peak AI compute (rack)2.9 exaflopsN/A
Scale-up fabricUALink over EthernetN/A
Scale-out bandwidth vs MI355X6x per GPUBaseline

The architectural shift matters more than raw specs. AMD moved from collections of eight-GPU servers to a 72-GPU shared-memory domain. Models too large for one node can run across the full rack without treating every exchange as a scale-out networking transaction. That benefits both training and inference on large models.

AMD uses UALink over Ethernet (UALoE) for its scale-up fabric, an open standard. Each MI455X provides 3.6TB/s of bidirectional scale-up bandwidth. The complete rack delivers all-to-all connectivity through a single switch layer. AMD claims 6x more scale-out bandwidth per GPU compared to MI355X when configured with three Pensando Vulcano 800 AI NICs.

Also Read
Etched hits $10.3B valuation in record Sequoia Series C

Another company challenging Nvidia's AI accelerator dominance

What's new with AMD's Venice CPUs?

The 6th Gen EPYC "Venice" CPUs handle orchestration duties in the Helios rack. Each of the 18 single-socket systems manages GPU coordination, data movement, and system-level operations. AMD positioned Venice as purpose-built for AI workloads requiring heavy CPU-GPU interaction, though detailed specifications weren't fully disclosed at the event.

Chart showing AMD EPYC CPU performance
Chart showing AMD EPYC CPU performance

The single-socket design is deliberate. It simplifies memory topology and reduces inter-socket communication overhead in AI inference workloads, where the GPUs do the heavy compute and CPUs primarily shuttle data and manage scheduling.

Advertisements

Open standards vs. vertical integration

AMD's bet on UALink and open networking standards gives cloud providers more control over suppliers and system design. Hyperscalers can mix components from multiple vendors rather than buying Nvidia's full stack. That's the upside.

The downside: AMD and its partners must prove those components deliver the predictable performance, reliability, and deployment experience customers get from Nvidia's tightly controlled platform. Software maturity is the other question. AMD's ROCm stack has improved, but Nvidia's CUDA ecosystem remains the default for most AI developers.

Helios includes automatic rerouting around failed links, virtual rack partitions, tray-level serviceability, and rack-wide power and health monitoring. These enterprise features signal AMD is targeting production deployments, not just benchmark competitions.

Also Read
Pichai deflects Gemini 3.5 Pro delay with Gemini 4 tease

How hyperscalers are positioning for next-gen AI infrastructure

When can enterprises deploy Helios?

AMD says Helios shipments begin in H2 2026, which is now. The ZT Systems acquisition last year brought engineering talent and IP specifically for rack-scale integration. That deal is now paying dividends.

Pricing wasn't announced. Expect AMD to position Helios competitively against Nvidia, particularly for customers wary of Nvidia's pricing power and supply constraints. The open-standard approach should also appeal to hyperscalers building custom configurations.

ℹ️

Logicity's Take

AMD's Helios announcement is technically impressive but faces a familiar problem: software ecosystem maturity. CIOs evaluating rack-scale AI infrastructure should benchmark real workloads, not spec sheets. Nvidia's Vera Rubin offers deeper software integration; AMD offers supplier flexibility and competitive pricing pressure. For organizations running inference-heavy agentic workflows on tools like [Zapier](https://logicity.in/r/zapier) or [n8n](https://logicity.in/r/n8n), the memory capacity advantage could matter more than raw compute. Ask vendors for total cost of ownership comparisons, not just hardware specs.

ℹ️

Disclosure

Some links in this post are affiliate links — Logicity earns a commission if you sign up, at no extra cost to you. We only link products we have used or actively recommend.

Frequently Asked Questions

When will AMD Helios be available?

AMD stated that Helios shipments begin in the second half of 2026, which has already started as of the July 23 announcement.

How does MI455X compare to Nvidia's GPUs?

AMD positions MI455X against Nvidia's Blackwell architecture. The 432GB HBM4 and 23.3TB/s bandwidth target memory-intensive reasoning models. Direct performance comparisons await independent benchmarks.

What is UALink over Ethernet?

UALoE is an open-standard scale-up fabric AMD uses for GPU-to-GPU communication within Helios racks. It provides an alternative to Nvidia's proprietary NVLink interconnect.

What workloads is Helios designed for?

AMD engineered Helios for large reasoning models, sustained inference, and agentic AI workflows that require substantial memory capacity and efficient data movement.

How many GPUs does a Helios rack contain?

A fully configured Helios rack contains 72 MI455X GPUs, 18 Venice CPUs, and Pensando networking components.

Also Read
ChatGPT flaw let attackers plant rogue AI agents inside workspaces

Security considerations for enterprise AI deployments

ℹ️

Need Help Implementing This?

Planning a rack-scale AI deployment? Contact Logicity's consulting team for vendor-neutral infrastructure assessments and ROI modeling for AMD, Nvidia, and alternative accelerator platforms.

Source: Computerworld

H

Huma Shazia

Senior AI & Tech Writer

Produced with AI assistance and reviewed by the Logicity editorial team. Learn more in our Editorial Policy.